1. Field of the Invention
This invention relates to a band compression circuit for reducing the number of bits of signals digitized from analog signals prior to transmitting the digitized signals.
2. Prior Art
Recently, with digital signals obtained upon sampling, quantizing and encoding analog audio or video signal, or so-called pulse code modulated signals (PCM signals), it has become possible to reduce the data quantity by taking advantage of the fact that the statistical properties of these digital signals exhibit certain variations and that certain portions of the signals are less critical in view of their effects on the visual and auditory senses. Thus it has been known that the signals undergo only little degradation in quality by differential, summation or companding operations for bit reduction.
One of such techniques of data compression or band compression is the floating operation as described in the Japanese Patent Publication No. 64 558 (1989). The floating operation resides in shifting n-bit input data by an amount corresponding to the data value and taking out m bits (where m&lt;n) by way of performing a local quantization. As an example, a floating operation consisting in compressing 16-bit-per-word input data in a 2's complement representation to 8-bit data and taking out the compressed data is explained by referring to FIGS. 1a to 1f, inclusive.
FIGS. 1a to 1f show the amount of bit shifts consistent with the range of values of the above mentioned 16-bit-per-word input data wherein only the positive value or the absolute value are taken into consideration. FIG. 1a shows the case in which the range of the input data values is 0 to 127 and the number of significant bits in the 16-bit input data is 7 or less, while FIGS. 1b to 1i show the cases in which the numbers of significant bits in the 16-bit input data are 8 to 15, respectively. In FIGS. 1a to 1i, the areas shown by hatched lines represent the significant bits, with the exception of FIG. 1a wherein the areas shown by hatched lines indicate the upper limit or the maximum value of the significant bit.
Referring first to FIG. 1a, since the number of the significant bits within the 16-bit input data is 7 or less, bit compression can be made by shifting the data by eight bits and taking out the upper eight bits without a rounding error (quantization error) at the time of the local quantization. Turning to FIG. 1b, since the range of input data values is 128 to 258, and the number of significant bits within the 16 bits, indicated by the area shown by hatched lines, is 8, the upper 8 bits can be taken out by shifting the input data by seven bits, with the rounding error being 1 bit. Turning to FIGS. 1c to 1i, since the numbers of significant bits are 9 to 15, respectively, the amounts of bit shift are 6 to 0 bits, respectively, with the rounding errors, indicated by the area shown by cross-hatched lines, being 2 to 8 bits, respectively. These rounding errors are fed back to the input side of the local quantizer (error feedback) for performing a so-called noise shaping, as disclosed in an article entitled "Adaptive Noise Spectral Shaping and Entropy coding in Predictive Coding of Speech" appearing at pages 63 to 73 of IEEE Transactions on Acoustics, Speech and Processing, vol, ASSP-27, No. 1, February 1979.
On many occasions, such a floating operation is implemented by a software program using a so-called digital signal processor (DSP). An example of an essential portion of the software program is shown in the following Table 1.
TABLE 1 ______________________________________ FLOAT LAC xn,1 Load input data to accumulator with 1 bit shift to left SACL xn Restore accumulator data in memory SUBS MAX Compare with MAC (7FFF) BLEZ FLOAT to FLOAT when accumulator data is MAX or less ______________________________________
On many occasions, such a floating operation is executed by so-called block floating by arranging input data consisting of a predetermined number of words into one block. In such case, the shifting quantity is determined on the basis of the peak value of the words in each block, and the totality of words in the block are bit-shifted by the same quantity.
FIG. 2 is a flow chart showing a practical example of a bit shifting program applied to a floating operation in which, as an example of the block floating, 16-bit-per-word input data in 2's complement representation are arranged into blocks, each consisting of a predetermined number of, for example, 28 words, the totality of words in each block are compressed to 8 bits by bit-shifting by the same quantity and the thus compressed data are taken out in the form of 8-bit compressed data. With the example shown in FIG. 2, when the number of the significant bits of input data is 8 bits, with the data value being 0 to 255, shifting by 8 or 7 bits is performed at one time. However, when the number of significant bits of the input data is 9 or more, the bit shifting operation by the above mentioned loop program is realized by a series of the decision steps to speed up the operation. In FIG. 2, P indicates the peak value which is the maximum value of the words in each block. The range of the peak value P is analyzed to determine the shift quantity.
In a first step 80 of FIG. 2, it is determined if the peak value P is 127 or less (P&lt;127?), that is if the number of the significant bits is 7 or less. If the result is YES, the program proceeds to step 9 where the input data are shifted by 8 bits towards the left as shown in FIG. 1a to output the upper 8 bits. If the result is NO, the program proceeds to step 81 where the peak value P is divided by 256 and the resulting quotient is set as a new peak Value P.sub.t (P.sub.t =P/256) The program then proceeds to step 82.
In step 82, it is determined if the peak value P.sub.2 is equal to zero. This operation is equivalent to determining if the original peak value P is 255 or less. If the result of the decision at step 82 is YES, the original peak value P is in the range from 128 to 255 (taking the result of the decision at step 80 into consideration) The program then proceeds to step 92 where the input data are shifted by 7 bits towards the left as shown in FIG. 1b to output the upper 8 bits. If the result of the decision at step 82 is NO, the program proceeds to the next step 83.
In step 83, a value equal to twice the peak value P.sub.t, or 2P.sub.t, is compared with 127, to determine if 2P.sub.t is larger than 127 (2P.sub.t &gt;127?). The operation in step 83 is equivalent to determining if the original peak value P is 16384 or more, that is if the number of significant bits is 15 or more. If the result of the decision at step 83 is YES, the program shifts to step 93 where the input data are shifted by zero bits towards the left, that is, not shifted towards the left, as shown in FIG. 12, and only the upper 8 bits are output. If the result of the decision at step 83 is NO, the program proceeds to step 84.
At step 84, it is determined if a value equal to twice the peak value P.sub.t, or 2P.sub.t, is larger than 63 (2P.sub.t &gt;63?) The operation at step 84 is equivalent to determining if, in conjunction with the decision at step 83, the number of significant bits of the original peak value P is equal to 14 bits, that is, if the original peak value P is within the range from 8192 to 16383 as shown in FIG. 1h. If the result of the decision at step 84 is YES, the program proceeds to step 94 where the input data are shifted by one bit towards the left as shown in FIG. 1h and only the upper 8 bits are output. If the result is NO, the program proceeds to next step 85.
At the following decision blocks 85 to 88, it is determined if the number of the significant bits of the original peak value P is equal to 13 to 10, respectively. If the results of the decisions at the decision blocks 85 to 88 are YES, the program proceeds to steps 95 to 98, respectively, where the input data are shifted by 2 to 5 bits, respectively, as shown in FIGS. 1g to 1d, respectively, with the upper 8 bits being output. If the results of the decisions at decision blocks 85 to 87 are NO, the program proceeds to the next decision blocks 86 to 88, respectively. If the result of the decision at step 88 is NO, the program proceeds to step 99 where the input data are shifted by 6 bits towards the left as shown in FIG. 1c, with the upper 8 bits being output.
When the floating operation is performed in accordance with the loop program shown in Table 1, the execute time per loop of the program amounts to 500 ns, with the machine cycle of the DSP of, for example, 100 ns, so that the total execute time for the maximum shift quantity of 8 bits amounts to 500 ns.times.8=4 .mu.s. In a practical system, When the number of significant bits of the input data is less than the lower 8 bits (0 to 255), and the shift quantity is 8 or 7 bits, shifting is executed within one machine cycle by using a so-called barrel shifter. However, even with such a practical system, if the input data are 256 to 511 and the shift quantity is a maximum of 6 bits, an execute time as long as 500 ns.times.6=3 .mu.s is necessitated to carry out only the looping step.
In practice, however, the execute time amounts to two to 2.5 times this figure because the operation of storing shift or ranging data in other memories or the above mentioned noise shaping operation need to be performed within the same loop in addition to the operation shown in Table 1. This problem is felt most acutely when the processings of several channels need to be performed in a time sharing fashion within one sample period. For example, when a compression of two channels is to be performed at a sampling frequency of 32 kHz, about half of the execute time is consumed in carrying out solely the floating operation, so that a limitation is imposed on the time to be allocated for the above mentioned other signal processing operations.
If the above mentioned looping operation is realized by a series of a number of the decision steps for increasing the processing speed, as shown in FIG. 2, the steps 80 to 88 and the shift steps 98 or 99, totalling 10 steps, are required just for a bit shift operation when the number of the significant bits of the peak value P is equal to 9 (265 to 511) or 10 (512 to 1023), resulting in more stringent limitations imposed on the remaining operations.